[Haskell-cafe] Reduceron: reduced to numbers.

Henning Thielemann schlepptop at henning-thielemann.de
Sat Dec 4 12:22:35 CET 2010

Serguey Zefirov schrieb:

> Of course, Reduceron in ASIC will require some cache memory, some
> controllers, etc. So it won't be that small, like 230K transistors.
> But, mzke it 2.3M transistors and it still be 2 orders of magnitude
> less than Core2 Duo... ;)

Cool! Do you have plans how it can be used eventually? As expansion
card? As main processor? How to compile Haskell to Reduceron code?

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