[GHC] #5506: LLVM AST : needs an LlvmType ctor to represent vectors so that LLVM can generate SIMD instructions

[GHC]

#5506: LLVM AST : needs an LlvmType ctor to represent vectors so that LLVM can
generate SIMD instructions
--------------------------+-------------------------------------------------
 Reporter:  erikd         |          Owner:  dterei          
     Type:  task          |         Status:  closed          
 Priority:  normal        |      Component:  Compiler (LLVM) 
  Version:  7.3           |     Resolution:  wontfix         
 Keywords:                |       Testcase:                  
Blockedby:                |             Os:  Unknown/Multiple
 Blocking:                |   Architecture:  Unknown/Multiple
  Failure:  None/Unknown  |  
--------------------------+-------------------------------------------------

Comment(by dterei):

 Apparently there are some other people working on this Erik (as in vector
 support in Haskell through LLVM), Manuel knows the details if you want to
 get involved. So closing this patch / ticket.

-- 
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/5506#comment:13>
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