[GHC] #3019: sparc membar asm instruction requires mode parameter

[GHC]

#3019: sparc membar asm instruction requires mode parameter
----------------------------------+-----------------------------------------
    Reporter:  duncan             |        Owner:  simonmar
        Type:  bug                |       Status:  new     
    Priority:  normal             |    Milestone:          
   Component:  Compiler           |      Version:  6.11    
    Severity:  normal             |   Resolution:          
    Keywords:                     |   Difficulty:  Unknown 
    Testcase:  rts/testwsdeque.c  |           Os:  Solaris 
Architecture:  sparc              |  
----------------------------------+-----------------------------------------
Comment (by duncan):

 Replying to [comment:3 duncan]:
 > As for performance, it is apparently a bit quicker than on x86 which is
 interesting. For reference, running the `testwsdeque` test prog with a 10x
 bigger problem size (ie `SCRATCH_SIZE`) on the UltraSPARC T2:

 Correction: the above were THREADS=n results. The number of threads
 actually being used is n+1 because of the main thread which is doing part
 of the work in the test. So for THREADS=7:

  * 8 threads: 1.79s (+/- 0.01)

 On x86-64 Simon reports THREADS=7:

  * 8 threads: 17.2s

 So we might hope that work-stealing queues for `par` sparks might be
 pretty nippy on the T2 cpus.

-- 
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/3019#comment:4>
GHC <http://www.haskell.org/ghc/>
The Glasgow Haskell Compiler