ARM64 Task Force

[Luke Iannini]

I think I've solved this particular mystery -- the registers were never
defined there because that integer-representation of them is only used by
the NCG. In LLVM land they were only ever stringified by the REG() macro.

Except now globalRegMaybe is being used in CmmSink.hs (as Simon and Ben
were discussing), and globalRegMaybe needs an integer value for each
register to put into its Maybe RealReg return value. Since CmmSink.hs only
checks 'isJust', it doesn't actually matter what the integer value is.

So I've just gone ahead and defined them sequentially for now which seems
to get me past this.

Thanks!
Luke


On Sat, Aug 9, 2014 at 4:22 AM, Karel Gardas <karel.gardas at centrum.cz>
wrote:

> On 08/ 9/14 05:27 AM, Luke Iannini wrote:
>
>> Hi Karel,
>> Thanks!
>>
>> A question:
>> https://git.haskell.org/ghc.git/commitdiff/454b34cb3b67dec21f023339c4d53d
>> 734af7605d
>> adds references to s16, s17, s18, s19, d10 and d11 but I don't see those
>>
>
> Yes, that adds FPU support for ARM.
>
>
>  where I though to expect them in
>> https://github.com/ghc/ghc/blob/master/includes/CodeGen.Platform.hs
>>
>
> Hmm, whole ARM reg set is missing in this file. IIRC Simon Marlow were
> discussing this with Ben Gamari recently. I've not investigated if this is
> needed or not since I don't know if this is used only in NCG or in
> registerised build in general. If the former, ARM will not be there as
> there is no ARM NCG yet, if the later, then ARM should be there as
> ARM/LLVM/registerised build is a reality.
>
> Cheers,
> Karel
>
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