[Git][ghc/ghc][wip/marge_bot_batch_merge_job] 19 commits: cmm: Introduce MO_RelaxedRead

Marge Bot (@marge-bot) gitlab at gitlab.haskell.org
Wed Dec 27 18:26:53 UTC 2023



Marge Bot pushed to branch wip/marge_bot_batch_merge_job at Glasgow Haskell Compiler / GHC


Commits:
4f874cf5 by Ben Gamari at 2023-12-27T13:26:40-05:00
cmm: Introduce MO_RelaxedRead

In hand-written Cmm it can sometimes be necessary to atomically load
from memory deep within an expression (e.g. see the `CHECK_GC` macro).
This MachOp provides a convenient way to do so without breaking the
expression into multiple statements.

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8fd807ab by Ben Gamari at 2023-12-27T13:26:40-05:00
codeGen: Use relaxed accesses in ticky bumping

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2cf38dae by Ben Gamari at 2023-12-27T13:26:40-05:00
base: use atomic write when updating timer manager

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6cf8441a by Ben Gamari at 2023-12-27T13:26:40-05:00
Use relaxed atomics to manipulate TSO status fields

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5e672d14 by Ben Gamari at 2023-12-27T13:26:40-05:00
rts: Add necessary barriers when manipulating TSO owner

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b2d71010 by Ben Gamari at 2023-12-27T13:26:40-05:00
rts: Use `switch` to branch on why_blocked

This is a semantics-preserving refactoring.

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944b4430 by Ben Gamari at 2023-12-27T13:26:40-05:00
rts: Fix synchronization on thread blocking state

We now use a release barrier whenever we update a thread's blocking
state. This required widening StgTSO.why_blocked as AArch64 does not
support atomic writes on 16-bit values.

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2b4e2a63 by Ben Gamari at 2023-12-27T13:26:40-05:00
rts: Fix data race in threadPaused

This only affects an assertion in the debug RTS and only needs relaxed
ordering.

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0ce68c9b by Ben Gamari at 2023-12-27T13:26:41-05:00
rts: Fix data race in threadStatus#

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afdf00be by Ben Gamari at 2023-12-27T13:26:41-05:00
rts: Fix data race in Interpreter's preemption check

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c7adc9e1 by Ben Gamari at 2023-12-27T13:26:41-05:00
rts/Messages: Fix data race

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4a8d1357 by Ben Gamari at 2023-12-27T13:26:41-05:00
rts/Prof: Fix data race

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c5dbdd5f by Ben Gamari at 2023-12-27T13:26:41-05:00
rts: Use relaxed ordering on dirty/clean info tables updates

When changing the dirty/clean state of a mutable object we needn't have
any particular ordering.

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a81a4a9f by Ben Gamari at 2023-12-27T13:26:41-05:00
codeGen: Use relaxed-read in closureInfoPtr

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e8e5958d by Ben Gamari at 2023-12-27T13:26:41-05:00
STM: Use acquire loads when possible

Full sequential consistency is not needed here.

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5c90e193 by Ben Gamari at 2023-12-27T13:26:41-05:00
rts: Use fence rather than redundant load

Previously we would use an atomic load to ensure acquire ordering.
However, we now have `ACQUIRE_FENCE_ON`, which allows us to express this
more directly.

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09e71dd7 by Ben Gamari at 2023-12-27T13:26:41-05:00
rts: Fix data races in profiling timer

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b9f52d8e by Ben Gamari at 2023-12-27T13:26:41-05:00
Add Note [C11 memory model]

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99aae0f4 by Xiaoyan Ren at 2023-12-27T13:26:44-05:00
Do not color the diagnostic code in error messages (#24172)

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30 changed files:

- compiler/GHC/Cmm/Expr.hs
- compiler/GHC/Cmm/Info.hs
- compiler/GHC/Cmm/MachOp.hs
- compiler/GHC/Cmm/Parser.y
- compiler/GHC/Cmm/ThreadSanitizer.hs
- compiler/GHC/CmmToAsm/AArch64/CodeGen.hs
- compiler/GHC/CmmToAsm/PPC/CodeGen.hs
- compiler/GHC/CmmToAsm/Wasm/FromCmm.hs
- compiler/GHC/CmmToAsm/X86/CodeGen.hs
- compiler/GHC/CmmToC.hs
- compiler/GHC/CmmToLlvm/CodeGen.hs
- compiler/GHC/StgToCmm/Ticky.hs
- compiler/GHC/StgToCmm/Utils.hs
- compiler/GHC/Types/Error.hs
- libraries/base/src/GHC/Event/Thread.hs
- rts/Exception.cmm
- rts/HeapStackCheck.cmm
- rts/Interpreter.c
- rts/Messages.c
- rts/PrimOps.cmm
- rts/Proftimer.c
- rts/RaiseAsync.c
- rts/STM.c
- rts/Schedule.c
- rts/StgMiscClosures.cmm
- rts/StgStartup.cmm
- rts/ThreadPaused.c
- rts/Threads.c
- rts/TraverseHeap.c
- rts/include/Cmm.h


The diff was not included because it is too large.


View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/compare/589d5cfc87f31657478d311d6dea1204ab41ec98...99aae0f4711e55f3b92bafe82102f77ec4fc49f7

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/compare/589d5cfc87f31657478d311d6dea1204ab41ec98...99aae0f4711e55f3b92bafe82102f77ec4fc49f7
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