Proposal: New Eq and Ord instances for Double and Float

[Tyson Whitehead]

On November 10, 2011 11:48:33 Simon Marlow wrote:
> On 10/11/2011 16:28, Roman Leshchinskiy wrote:
> > I would, of course, expect the RTS to convert the processor exception to
> > a Haskell exception!
> 
> You have high expectations :-)  I don't think it's possible to do that
> without some very low-level platform-specific and processor-specific
> hacking, which is why for example we have the current software test for
> divide-by-zero.  You basically get a signal and have to grovel around in
> the thread's registers and stack to recover the situation, and the
> exception could be thrown from *anywhere*.

Historically some processors have also made these exceptions imprecise as 
faster execution can be produced by not having the pipeline be constrained by 
the requirement to roll earlier stage effects back if an exception is raised.

http://books.google.ca/books?id=GumAeql5KPkC&pg=SA4-PA69&lpg=SA4-
PA69&dq=alpha+imprecise+traps

While software barriers can be inserted to make it possible to pin exceptions 
down to greater degrees (see -mtrap-precision), it costs you performance.

http://gcc.gnu.org/onlinedocs/gcc/DEC-Alpha-Options.html

Cheers!  -Tyson