[GHC] #5824: ARM StgRun register clobber list is broken

[GHC]

#5824: ARM StgRun register clobber list is broken
-------------------------------+--------------------------------------------
    Reporter:  bgamari         |       Owner:  simonmar        
        Type:  bug             |      Status:  patch           
    Priority:  high            |   Milestone:  7.4.2           
   Component:  Runtime System  |     Version:  7.4.1-rc2       
    Keywords:                  |          Os:  Unknown/Multiple
Architecture:  arm             |     Failure:  None/Unknown    
  Difficulty:  Unknown         |    Testcase:                  
   Blockedby:                  |    Blocking:                  
     Related:                  |  
-------------------------------+--------------------------------------------

Comment(by nomeata):

 Replying to [comment:12 igloo]:
 > Rather than doing a full GHC build, I'd recommend trying to reproduce
 the error by compiling a standalone C file containing the inline asm, and
 then experiment to find out what is and isn't accepted in it.

 I tried with this code:

 {{{
 #ifdef LEADING_UNDERSCORE
 #define STG_RUN "_StgRun"
 #define STG_RETURN "_StgReturn"
 #else
 #define STG_RUN "StgRun"
 #define STG_RETURN "StgReturn"
 #endif

 #if defined(__thumb__)
 #define THUMB_FUNC ".thumb\n\t.thumb_func\n\t"
 #else
 #define THUMB_FUNC
 #endif

 #define arm_HOST_ARCH_PRE_ARMv6

 void *f(void) {
     void *basereg;
     void * r;
     __asm__ volatile (
         /*
          * save callee-saves registers on behalf of the STG code.
          */
         "stmfd sp!, {r4-r10, fp, ip, lr}\n\t"
 #if !defined(arm_HOST_ARCH_PRE_ARMv6)
         "vstmdb sp!, {d8-d11}\n\t"
 #endif
         /*
          * allocate some space for Stg machine's temporary storage.
          * Note: RESERVER_C_STACK_BYTES has to be a round number here or
          * the assembler can't assemble it.
          */
         "sub sp, sp, %3\n\t"
         /*
          * Set BaseReg
          */
         "mov r4, %2\n\t"
         /*
          * Jump to function argument.
          */
         "bx %1\n\t"

         ".global " STG_RETURN "\n\t"
         THUMB_FUNC
         ".type " STG_RETURN ", %%function\n"
         STG_RETURN ":\n\t"
         /*
          * Free the space we allocated
          */
         "add sp, sp, %3\n\t"
         /*
          * Return the new register table, taking it from Stg's R1 (ARM's
 R7).
          */
         "mov %0, r7\n\t"
         /*
          * restore callee-saves registers.
          */
 #if !defined(arm_HOST_ARCH_PRE_ARMv6)
         "vldmia sp!, {d8-d11}\n\t"
 #endif
         "ldmfd sp!, {r4-r10, fp, ip, lr}\n\t"
       : "=r" (r)
       : "r" (f), "r" (basereg), "i" (123)
       :
     );
     return r;
 }
 }}}

 and running {{{gcc -c test.c -o test.o}}} on an armel machine works fine.
 The test machine that I have access to is not the autobuilder box, but a
 also a “Marvell Feroceon CPU @ 1GHz on a Marvell DB-78x00-BP Development
 Board (ARM v5)”, so I guess setting arm_HOST_ARCH_PRE_ARMv6 is correct.

 Not defining this yields:
 {{{
 $ gcc -c test.c -o test.o
 /tmp/ccL5k8Fg.s: Assembler messages:
 /tmp/ccL5k8Fg.s:29: Error: selected processor does not support ARM mode
 `vstmdb sp!,{d8-d11}'
 /tmp/ccL5k8Fg.s:38: Error: selected processor does not support ARM mode
 `vldmia sp!,{d8-d11}'
 }}}

 So this does not give any insight into the problem.

-- 
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/5824#comment:15>
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