[GHC] #3019: sparc membar asm instruction requires mode parameter

[GHC]

#3019: sparc membar asm instruction requires mode parameter
--------------------+-------------------------------------------------------
Reporter:  duncan   |          Owner:  simonmar         
    Type:  bug      |         Status:  new              
Priority:  normal   |      Component:  Compiler         
 Version:  6.11     |       Severity:  normal           
Keywords:           |       Testcase:  rts/testwsdeque.c
      Os:  Solaris  |   Architecture:  sparc            
--------------------+-------------------------------------------------------
 The new `parallel/WSDeque.c` uses `store_load_barrier()` from
 `includes/SMP.h`.

 {{{
 EXTERN_INLINE void
 store_load_barrier(void) {
 #if i386_HOST_ARCH
     __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory");
 #elif x86_64_HOST_ARCH
     __asm__ __volatile__ ("lock; addq $0,0(%%rsp)" : : : "memory");
 #elif powerpc_HOST_ARCH
     __asm__ __volatile__ ("msync" : : : "memory");
 #elif sparc_HOST_ARCH
     /* Sparc in TSO mode does not require write/write barriers. */
     __asm__ __volatile__ ("membar" : : : "memory");
 #elif !defined(WITHSMP)
     return;
 #else
 #error memory barriers unimplemented on this architecture
 #endif
 }}}

 In particular for sparc the bit:
 {{{
     /* Sparc in TSO mode does not require write/write barriers. */
     __asm__ __volatile__ ("membar" : : : "memory");
 }}}

 This is not right. The membar assembly statement requires a parameter to
 specify which kind of memory barrier is required. For
 `store_load_barrier()` it is of course `membar #StoreLoad`.

 Without this the assembler complains:
 {{{
 /usr/ccs/bin/as: "parallel/WSDeque.s", line 11: error: statement syntax
 }}}

 With `#StoreLoad` added it's fine.

 Note also that the comment appears to be wrong
 {{{
     /* Sparc in TSO mode does not require write/write barriers. */
 }}}
 This is `store_load_barrier()` not `store_store_barrier()` so it is
 exactly and only this case that is required.

-- 
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/3019>
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