[GHC] #2028: STM slightly conservative on write-only transactions

[GHC]

#2028: STM slightly conservative on write-only transactions
-----------------------+----------------------------------------------------
 Reporter:  JulesBean  |          Owner:         
     Type:  proposal   |         Status:  new    
 Priority:  normal     |      Milestone:         
Component:  Compiler   |        Version:  6.8.1  
 Severity:  normal     |     Resolution:         
 Keywords:             |     Difficulty:  Unknown
 Testcase:             |   Architecture:  Unknown
       Os:  Unknown    |  
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Comment (by Isaac Dupree):

 Probably I don't completely understand STM, but... if these happen at the
 same time, won't we potentially end up with an inconsistent state if no-
 one retries?

 {{{
 atomically $ mapM (\tv -> writeTVar tv 0) [tv1,tv2,tv3,tv4]
 }}}
 {{{
 atomically $ mapM (\tv -> writeTVar tv 1) [tv4,tv3,tv2,tv1]
 }}}

 (and don't single-word transactions depend on the hardware/architecture as
 for whether they are atomic?)

-- 
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/2028#comment:2>
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