[GHC] #14619: Output value of program changes upon compiling with -O optimizations

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Sat Jan 27 19:51:50 UTC 2018


#14619: Output value of program changes upon compiling with -O optimizations
-------------------------------------+-------------------------------------
        Reporter:  sheaf             |                Owner:  (none)
            Type:  bug               |               Status:  new
        Priority:  highest           |            Milestone:  8.4.1
       Component:  Compiler          |              Version:  8.2.2
      Resolution:                    |             Keywords:
Operating System:  Windows           |         Architecture:  x86_64
 Type of failure:  Incorrect result  |  (amd64)
  at runtime                         |            Test Case:
      Blocked By:                    |             Blocking:
 Related Tickets:                    |  Differential Rev(s):
       Wiki Page:                    |
-------------------------------------+-------------------------------------

Comment (by AndreasK):

 I think the sinking pass is fine, the code below fails:
 {{{
       c3Yz: // global
           _s3Wg::F64 = %MO_F_Add_W64(%MO_F_Add_W64(%MO_F_Mul_W64(D1, D4),
                                                    %MO_F_Mul_W64(D2, D5)),
                                      %MO_F_Mul_W64(D3, D6));
           if (%MO_F_Lt_W64(_s3Wg::F64,
                            0.0 :: W64)) goto c3Zq; else goto c3Zp;
       c3Zp: // global
           _s3We::F64 = D5;
           _s3Wd::F64 = D4;
           _s3Wc::F64 = D3;
           _s3Wb::F64 = D2;
           _s3Wa::F64 = D1;
           (_c3YT::F64) = call MO_F64_Sqrt(_s3Wg::F64);
           _s3Wn::F64 = %MO_F_Sub_W64(_s3Wg::F64, _c3YT::F64);
           if (%MO_F_Gt_W64(_s3Wn::F64,
                            0.0 :: W64)) goto c3Zn; else goto c3Zi;
       c3Zn: // global
           I64[Hp - 40] = GHC.Types.D#_con_info;
           F64[Hp - 32] = D6;
           I64[Hp - 24] = GHC.Types.D#_con_info;
           F64[Hp - 16] = _s3We::F64;
           I64[Hp - 8] = GHC.Types.D#_con_info;
           F64[Hp] = _s3Wd::F64;
           R3 = Hp - 39;
           R2 = Hp - 23;
           R1 = Hp - 7;
           call (P64[Sp])(R3, R2, R1) args: 8, res: 0, upd: 8;
 ...
 }}}

 If we respect the calling convention and MO_F_Add/Mul don't clobber their
 arguments the code would be fine.

 I guess the liveness analysis when assigning registers thinks sqrt
 clobbers D6/xmm6 anyway so it's free to use it as a scratch register
 before that.

-- 
Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/14619#comment:33>
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