[GHC] #8033: add AVX register support to llvm calling convention
GHC
ghc-devs at haskell.org
Tue Jul 9 18:40:31 CEST 2013
#8033: add AVX register support to llvm calling convention
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Reporter: carter | Owner: carter
Type: task | Status: new
Priority: normal | Milestone:
Component: Compiler | Version: 7.7
Resolution: | Keywords:
Operating System: Unknown/Multiple | Architecture: Unknown/Multiple
Type of failure: None/Unknown | Difficulty: Unknown
Test Case: | Blocked By:
Blocking: | Related Tickets:
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Comment (by carter):
{{{
// Pass in STG registers for floats, doubles and 128bit simd vectors
CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
CCIfSubtarget<"hasSSE1()",
CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>,
// Pass in STG registers for 256bit simd vectors
CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
CCIfSubtarget<"hasAVX()",
CCAssignToReg<[YMM0, YMM1, YMM2, YMM3,
YMM4, YMM5, YMM6]>>>
}}}
will be added to both stanzas then
--
Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/8033#comment:18>
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