Error: selected processor does not support ARM mode `ldrd r0, r1, [r7, #64]'

Ben Gamari ben at
Tue Nov 3 16:56:14 UTC 2015

Joachim Breitner <mail at> writes:

> Hi,
> Am Dienstag, den 03.11.2015, 08:47 -0600 schrieb Austin Seipp:
>> Isn't armel the (old, but not EABI-very-old) pre-hardware-floating
>> point ABI?
> I believe so, but I’m sure Erik knows better.
>> In any case, this is fallout from
>> 933adc0f31164cb651d11ecfcfe612ac429f714f, but fixing it means we'd
>> need to add in several more code paths to handle this case... So I
>> suppose we should probably file a ticket and get that fixed for 8.0
> Well, it is a regression over 7.10.2; such a thing should not happen in
> a stable point release, shouldn’t it?
Indeed this appears to be regression compared to 7.10.2 for some.
However for most users it will be a significant improvement in

ARM processors can run code encoded in one of several instruction sets
of which ARM and Thumb are two. The issue here is that we have never
been able to handle Thumb instructions correctly; we fare even worse in
cases where we have Thumb and ARM instructions in the same executable
due to various linker issues:

 * the runtime's linker doesn't support loading heterogeneous code at

 * the system's dynamic linker will almost certainly screw up our info
   tables due to the need for a trampoline (for this reason , I'm not
   even sure whether it's possible to handle Thumb-ARM interworking in
   Haskell code)

There are several places where Thumb instructions could come from,

 1. GHCi produced them in mkJumpToAddr

 2. native code compiled with GCC, which defaults to Thumb on many

 3. system libraries, which are Thumb on many distributions

The solution which Erik implemented was to switch entirely to ARM. (1)
was addressed by changing the GHC, (2) was fixed by explicitly passing
-marm to GCC. I'm actually not sure the state of (3).

Regardless, the solution to (2) is clearly upsetting your system. This
is odd as I was under the impression that all non-microcontroller ARM
devices support the full ARM instruction set (the Cortex devices, on the
other hand, only support Thumb but are totally incapable of running GHC
at all). What hardware and distribution is this?


- Ben

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