Simd ghc and llvm Re: PSA: GHC can now be built with Clang
carter.schonwald at gmail.com
Wed Jul 3 02:03:58 CEST 2013
1-2 typoes may have made it unclear.
Avx2 machines (intel haswell CPUs) have a rich array of 256bit simd
registers. And lots of useful instructions for them.
The ghc calling convention in llvm currently only exposes being able to use
those simd registers in their 128 bit form.
Would be backwards compatible and future proof to add support for the
256bit registers in the calling convention spec in llvm.
If there's a clear concensus on this, I'm happy / willing to do the work
to try and get that patch under consideration for the next llvm point
On Tuesday, July 2, 2013, Carter Schonwald wrote:
> Which reminds me: should we look into getting a patch into llvm'd ghc
> calling convention so that on avx2 capable machines so we can eventually
> add support for the 256bit Ymm resisters and primops to ghc? We really
> should make sure it's patched in on the llvm side first.
> I believe it'd be a 2 line patch, might even be something we could get
> into the next llvm point release if there's a clear agreement about it too.
> Thoughts? I'm happy to put a ticket on trac for this andor do the leg work
> to make it happen if everyone agrees.
> On Tuesday, July 2, 2013, Ryan Newton wrote:
>> Gosh, sorry, yes it's not obvious from the list of accepted papers:
>> "Automatic SIMD Vectorization for Haskell" Leaf Petersen, Dominic Orchard
>> and Neal Glew
>> One of the authors has a link for it but it appears there's no preprint
>> up yet:
>> On Tue, Jul 2, 2013 at 5:36 AM, Nicolas Trangez <nicolas at incubaid.com>wrote:
>>> On Mon, 2013-07-01 at 12:05 -0400, Ryan Newton wrote:
>>> > Err, GCC replacement. But, ironically, GHC [backend] replacement as
>>> > as of the recent ICFP paper.
>>> Got a link or reference?
>>> ghc-devs mailing list
>>> ghc-devs at haskell.org
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