simd branch ready for review

Johan Tibell johan.tibell at gmail.com
Wed Feb 6 01:44:02 CET 2013


If I understand the code correctly, you use __GLASGOW_HASKELL_LLVM__ to
make sure that AVX instructions are available. But using LLVM is no
guarantee for that; it depends on what -m flags are passed to LLVM.
Presumably LLVM already does what I suggest and lower vector instructions
to different instructions, depending on the actual compilation target. Or
does it fail altogether if the target architecture doesn't support vector
instructions?
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.haskell.org/pipermail/ghc-devs/attachments/20130205/c6dee5ab/attachment.htm>


More information about the ghc-devs mailing list