simd branch ready for review
marlowsd at gmail.com
Fri Feb 1 09:03:27 CET 2013
On 31/01/13 20:30, Geoffrey Mainland wrote:
> Simon, this reminds me of two other issues...
> 1) SSE vector values are only passed in registers on x86-64 anyway right
> now. MAX_REAL_FLOAT_REG and MAX_REAL_DOUBLE_REG are both #defined to 0
> on x86-32 in includes/stg/MachRegs.h. Are floats and double not passed
> in registers on x86-32? I'm confused as to how this works. The GHC
> calling convention in LLVM certainly says they are passed in registers.
No, floats are not passed in registers on x86-32. I don't know about LLVM.
> 2) SSE support is processor and platform dependent. What is the proper
> way for the programmer to know what SSE primitives are available? A CPP
> define? If so, what should it be called?
> Right now one can look at the TARGET_* and __GLASGOW_HASKELL_LLVM__ CPP
> macros and make a decision as to whether or not SSE primitives are
> available, but that's not a great solution. Also, what happens when we
> want to add AVX support? How do we control the inclusion of AVX support
> when building GHC, and how do we let the programmer know that the AVX
> primops/primtypes are available for use?
We #define __SSE__: http://hackage.haskell.org/trac/ghc/ticket/7554
Similar things would need to happen for AVX.
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