[Git][ghc/ghc][wip/supersven/riscv-vectors] WIP: cpuinfo Zvl* extensions

[Sven Tennie (@supersven)]

Sven Tennie pushed to branch wip/supersven/riscv-vectors at Glasgow Haskell Compiler / GHC


Commits:
6d1ff74f by Sven Tennie at 2025-03-16T13:20:52+01:00
WIP: cpuinfo Zvl* extensions

- - - - -


1 changed file:

- testsuite/driver/cpuinfo.py


Changes:

=====================================
testsuite/driver/cpuinfo.py
=====================================
@@ -2129,7 +2129,28 @@ def _get_cpu_info_from_riscv_isa():
 	Returns the CPU info gathered from 'cat /proc/device-tree/cpus/cpu at 0/riscv,isa'
 	Returns {} if this file does not exist (i.e. we're not on RISC-V Linux)
 	'''
-	g_trace.header('Tying to get info from lsprop ...')
+
+    def remove_prefix(prefix, text):
+        if text.startswith(prefix):
+            return text[len(prefix):]
+        return text
+
+    def run_asm(*machine_code):
+        asm = ASM(ctypes.c_uint32, (), machine_code)
+        asm.compile()
+        retval = asm.run()
+        asm.free()
+        return retval
+
+    def unique_items(original_list):
+        unique_list = []
+        seen = set()
+        for item in original_list:
+            if item not in seen:
+                unique_list.append(item)
+                seen.add(item)
+
+	g_trace.header('Tying to get info from device-tree ...')
 
 	try:
 		returncode, output = DataSource.riscv_isa()
@@ -2137,8 +2158,49 @@ def _get_cpu_info_from_riscv_isa():
 			g_trace.fail('Failed to cat /proc/device-tree/cpus/cpu at 0/riscv,isa. Skipping ...')
 			return {}
 
+        flags = output.split('_')
+
+        # The usage of the Zvl* extensions in the industry is very
+        # inconsistent. Though, they are useful to communicate the VLEN. So, if
+        # they are not provided by the system, we try to figure them out on our
+        # own.
+
+        # E.g. rv64imafdcvh
+        arch_string = flags[0]
+        profile_features = remove_prefix('rv64', remove_prefix('rv32', arch_string))
+        additional_flags = []
+        if profile_features.contains('v') and not output.contains('_zvl'):
+            g_trace.header('Figure out VLEN and Zvl* extensions ...')
+
+            vlen = 0
+
+            if arch_string.startswith('rv32'):
+                vlen = run_asm(
+                    b"\xc2\x20\x25\x73", # csrr a0, 0xc22
+                    b"\x00\x00\x80\x67"  # ret
+                )
+            elif arch_string.startswith('rv64'):
+                vlen = run_asm(
+                    b"\xc2\x20\x25\x73", # csrr	a0, 0xc22
+                    b"\x00\x05\x05\x1b", # sext.w a0, a0
+                    b"\x00\x00\x80\x67"  # ret
+                )
+
+            if vlen >= 32:
+                additional_flags.append('zvl32b')
+            if vlen >= 64:
+                additional_flags.append('zvl64b')
+            if vlen >= 128:
+                additional_flags.append('zvl128b')
+            if vlen >= 256:
+                additional_flags.append('zvl256b')
+            if vlen >= 512:
+                additional_flags.append('zvl512b')
+            if vlen >= 1024:
+                additional_flags.append('zvl1024b')
+
 		info = {
-			'flags' : output.split('_')
+			'flags' : unique_items(flags.append(additional_flags))
 		}
 		info = _filter_dict_keys_with_empty_values(info)
 		g_trace.success()



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/6d1ff74f191e388b95dfe6878b0019186ad4d2eb

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/6d1ff74f191e388b95dfe6878b0019186ad4d2eb
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