[Git][ghc/ghc][wip/marge_bot_batch_merge_job] 4 commits: gitlab: mention CLC in MR template
Marge Bot (@marge-bot)
gitlab at gitlab.haskell.org
Fri Nov 15 21:47:33 UTC 2024
Marge Bot pushed to branch wip/marge_bot_batch_merge_job at Glasgow Haskell Compiler / GHC
Commits:
1acb73bf by Andrew Lelechenko at 2024-11-15T06:10:47-05:00
gitlab: mention CLC in MR template
- - - - -
8f2e0832 by Ben Gamari at 2024-11-15T06:11:24-05:00
rts: Allow use of GNU-stack notes on FreeBSD
Previously we gated use of GNU-style non-executable stack notes to only
apply on Linux. However, these are also supported by FreeBSD, which also
uses ELF. Fix this.
Fixes #25475.
- - - - -
e1063c5e by Ben Gamari at 2024-11-15T16:47:24-05:00
rts: Fix EINTR check in timerfd ticker
When `poll` failed we previously checked that `errno == -EINTR` to
silence the failure warning. However, this is wrong as `errno` values
are generally not negated error codes (in contrast to many system call
results, which is likely what the original author had in mind).
Fixes #25477.
- - - - -
d55e1a11 by Ben Gamari at 2024-11-15T16:47:24-05:00
rts: Increase gen_workspace alignment to 128 bytes on AArch64
Increase to match the 128-byte cache-line size of Apple's ARMv8
implementation.
Closes #25459.
- - - - -
12 changed files:
- .gitlab/merge_request_templates/Default.md
- rts/Capability.h
- rts/StgCRunAsm.S
- rts/adjustor/NativeAmd64Asm.S
- rts/adjustor/NativeAmd64MingwAsm.S
- rts/adjustor/Nativei386Asm.S
- rts/configure.ac
- rts/include/rts/Config.h
- rts/include/rts/storage/HeapAlloc.h
- rts/posix/ticker/TimerFd.c
- rts/sm/GC.c
- rts/sm/GCThread.h
Changes:
=====================================
.gitlab/merge_request_templates/Default.md
=====================================
@@ -7,7 +7,12 @@ expectations. Also please answer the following question in your MR description:*
Please take a few moments to address the following points:
- * [ ] if your MR may break existing programs (e.g. touches `base` or causes the
+ * [ ] if your MR touches `base` (or touches parts of `ghc-internal` used
+ or re-exported by `base`) more substantially than just amending comments
+ or documentation, you likely need to raise a
+ [CLC proposal](https://github.com/haskell/core-libraries-committee#base-package)
+ before merging it.
+ * [ ] if your MR may break existing programs (e.g. causes the
compiler to reject programs), please describe the expected breakage and add
the ~"user-facing" label. This will run ghc/head.hackage> to characterise
the effect of your change on Hackage.
=====================================
rts/Capability.h
=====================================
@@ -29,11 +29,7 @@
// We never want a Capability to overlap a cache line with
// anything else, so round it up to a cache line size:
-#if defined(s390x_HOST_ARCH)
-#define CAPABILITY_ALIGNMENT 256
-#else
-#define CAPABILITY_ALIGNMENT 64
-#endif
+#define CAPABILITY_ALIGNMENT CACHELINE_SIZE
/* A forward declaration of the per-capability data structures belonging to
* the I/O manager. It is opaque and only passed by pointer, so the full
=====================================
rts/StgCRunAsm.S
=====================================
@@ -497,6 +497,6 @@ StgReturn:
#endif /* !USE_MINIINTERPRETER */
/* mark stack as nonexecutable */
-#if defined(__linux__) && defined(__ELF__)
+#if defined(HAVE_GNU_NONEXEC_STACK)
.section .note.GNU-stack,"", at progbits
#endif
=====================================
rts/adjustor/NativeAmd64Asm.S
=====================================
@@ -113,6 +113,6 @@ complex_ccall_ret_code:
ret
/* mark stack as nonexecutable */
-#if defined(__linux__) && defined(__ELF__)
+#if defined(HAVE_GNU_NONEXEC_STACK)
.section .note.GNU-stack,"", at progbits
#endif
=====================================
rts/adjustor/NativeAmd64MingwAsm.S
=====================================
@@ -135,6 +135,6 @@ complex_ccall_ret_code:
ret
/* mark stack as nonexecutable */
-#if defined(__linux__) && defined(__ELF__)
+#if defined(HAVE_GNU_NONEXEC_STACK)
.section .note.GNU-stack,"", at progbits
#endif
=====================================
rts/adjustor/Nativei386Asm.S
=====================================
@@ -52,6 +52,6 @@ DECLARE_CSYM(ccall_adjustor)
ret
/* mark stack as nonexecutable */
-#if defined(__linux__) && defined(__ELF__)
+#if defined(HAVE_GNU_NONEXEC_STACK)
.section .note.GNU-stack,"", at progbits
#endif
=====================================
rts/configure.ac
=====================================
@@ -83,6 +83,10 @@ AS_IF([test x"${TargetHasSubsectionsViaSymbols}" = x"YES"],
[AC_DEFINE([HAVE_SUBSECTIONS_VIA_SYMBOLS],[1],
[Define to 1 if Apple-style dead-stripping is supported.])])
+GHC_GNU_NONEXEC_STACK
+AS_IF([test x"$TargetHasGnuNonexecStack" = x"YES"],
+ [AC_DEFINE([HAVE_GNU_NONEXEC_STACK], [1], [Define (to 1) if GNU-style non-executable stack note is supported])])
+
dnl --------------------------------------------------
dnl * Platform header file and syscall feature tests
dnl ### checking the state of the local header files and syscalls ###
=====================================
rts/include/rts/Config.h
=====================================
@@ -82,3 +82,19 @@ code.
#else
#define MAX_N_CAPABILITIES 1
#endif
+
+// The host's cacheline size.
+// We use 128-bytes here on AArch64 as this is the cache-line size of new Apple
+// ARMv8 platforms.
+//
+// At some point we may want to determine this via `configure`.
+#if defined(s390x_HOST_ARCH)
+#define CACHELINE_SIZE 256
+#elif defined(aarch64_HOST_ARCH)
+#define CACHELINE_SIZE 128
+#elif defined(x86_64_HOST_ARCH)
+#define CACHELINE_SIZE 64
+#else
+#define CACHELINE_SIZE 64
+#endif
+
=====================================
rts/include/rts/storage/HeapAlloc.h
=====================================
@@ -59,7 +59,7 @@ extern SpinLock gc_alloc_block_sync;
struct mblock_address_range {
W_ begin, end;
W_ padding[6]; // ensure nothing else inhabits this cache line
-} ATTRIBUTE_ALIGNED(64);
+} ATTRIBUTE_ALIGNED(CACHELINE_SIZE);
extern struct mblock_address_range mblock_address_space;
# define HEAP_ALLOCED(p) ((W_)(p) >= mblock_address_space.begin && \
=====================================
rts/posix/ticker/TimerFd.c
=====================================
@@ -115,7 +115,7 @@ static void *itimer_thread_func(void *_handle_tick)
// While the RTS attempts to mask signals, some foreign libraries
// may rely on signal delivery may unmask them. Consequently we may
// see EINTR. See #24610.
- if (errno != -EINTR) {
+ if (errno != EINTR) {
sysErrorBelch("Ticker: poll failed: %s", strerror(errno));
}
}
=====================================
rts/sm/GC.c
=====================================
@@ -153,9 +153,9 @@ static Condition gc_exit_arrived_cv;
static Condition gc_exit_leave_now_cv;
#else // THREADED_RTS
-// Must be aligned to 64-bytes to meet stated 64-byte alignment of gen_workspace
+// Must match the alignment of gen_workspace.
StgWord8 the_gc_thread[sizeof(gc_thread) + 64 * sizeof(gen_workspace)]
- ATTRIBUTE_ALIGNED(64);
+ ATTRIBUTE_ALIGNED(GEN_WORKSPACE_ALIGNMENT);
#endif // THREADED_RTS
/* Note [n_gc_threads]
=====================================
rts/sm/GCThread.h
=====================================
@@ -75,6 +75,14 @@
------------------------------------------------------------------------- */
+// align so that:
+// * no two threads' workspaces fall in the same cache-line
+// * computing gct->gens[n] is a shift, not a multiply
+// fails if the size is <64, which is why we need the pad above
+// We use 128-bytes here as this is the cache-line size of new Apple ARMv8
+// platforms.
+#define GEN_WORKSPACE_ALIGNMENT CACHELINE_SIZE
+
typedef struct gen_workspace_ {
generation * gen; // the gen for this workspace
struct gc_thread_ * my_gct; // the gc_thread that contains this workspace
@@ -101,9 +109,7 @@ typedef struct gen_workspace_ {
bdescr * part_list;
StgWord n_part_blocks; // count of above
StgWord n_part_words;
-} gen_workspace ATTRIBUTE_ALIGNED(64);
-// align so that computing gct->gens[n] is a shift, not a multiply
-// fails if the size is <64, which is why we need the pad above
+} gen_workspace ATTRIBUTE_ALIGNED(GEN_WORKSPACE_ALIGNMENT);
/* ----------------------------------------------------------------------------
GC thread object
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/compare/16efa1439b7a415f5e3d1cb32bc3b70cf65ab8ed...d55e1a11d401dfab3751f43c6c3a2540c4f02813
--
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/compare/16efa1439b7a415f5e3d1cb32bc3b70cf65ab8ed...d55e1a11d401dfab3751f43c6c3a2540c4f02813
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