[Git][ghc/ghc][wip/ncg-simd] X86 NCG: use FF64 format for Float MOV instructions

[sheaf (@sheaf)]

sheaf pushed to branch wip/ncg-simd at Glasgow Haskell Compiler / GHC


Commits:
95d3ef7b by sheaf at 2024-06-18T15:34:41+02:00
X86 NCG: use FF64 format for Float MOV instructions

- - - - -


1 changed file:

- compiler/GHC/CmmToAsm/X86/Instr.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/X86/Instr.hs
=====================================
@@ -875,7 +875,7 @@ mkSpillInstr config reg fmt delta slot
           -> [MOVU fmt (OpReg reg) (OpAddr (spRel platform off))]
             -- NB: not using MOVA, because we have no guarantees about the stack
             -- being sufficiently aligned, including even numbered stack slots.
-        _ -> [MOV fmt (OpReg reg) (OpAddr (spRel platform off))]
+        _ -> [MOV (scalarMoveFormat platform fmt) (OpReg reg) (OpAddr (spRel platform off))]
     where platform = ncgPlatform config
 
 -- | Make a spill reload instruction.
@@ -897,8 +897,7 @@ mkLoadInstr config reg fmt delta slot
             -> [MOVU fmt (OpAddr (spRel platform off)) (OpReg reg)]
             -- NB: not using MOVA, because we have no guarantees about the stack
             -- being sufficiently aligned, including even numbered stack slots.
-          _ -> [MOV fmt (OpAddr (spRel platform off)) (OpReg reg)]
-
+          _ -> [MOV (scalarMoveFormat platform fmt) (OpAddr (spRel platform off)) (OpReg reg)]
     where platform = ncgPlatform config
 
 spillSlotSize :: Platform -> Int
@@ -965,8 +964,19 @@ mkRegRegMoveInstr _platform fmt@(VecFormat _ s) src dst
   = if widthInBytes (formatToWidth fmt) <= 128
     then MOVU fmt (OpReg src) (OpReg dst)
     else VMOVU fmt (OpReg src) (OpReg dst)
-mkRegRegMoveInstr _platform fmt src dst
-  = MOV fmt (OpReg src) (OpReg dst)
+mkRegRegMoveInstr platform fmt src dst
+  = MOV (scalarMoveFormat platform fmt) (OpReg src) (OpReg dst)
+
+scalarMoveFormat :: Platform -> Format -> Format
+scalarMoveFormat platform fmt
+  | isFloatFormat fmt
+  = FF64
+  | II64 <- fmt
+  = II64
+  | PW4 <- platformWordSize platform
+  = II32
+  | otherwise
+  = II64
 
 -- | Check whether an instruction represents a reg-reg move.
 --      The register allocator attempts to eliminate reg->reg moves whenever it can,



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/95d3ef7b4fc000185338aae2757bf8752e3cec92

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/95d3ef7b4fc000185338aae2757bf8752e3cec92
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