[Git][ghc/ghc][wip/supersven/riscv-vectors] Configure vector register width

[Sven Tennie (@supersven)]

Sven Tennie pushed to branch wip/supersven/riscv-vectors at Glasgow Haskell Compiler / GHC


Commits:
158c705b by Sven Tennie at 2024-12-30T19:27:26+01:00
Configure vector register width

- - - - -


3 changed files:

- compiler/GHC/CmmToAsm/Config.hs
- compiler/GHC/Driver/Config/CmmToAsm.hs
- compiler/GHC/Driver/Session.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/Config.hs
=====================================
@@ -33,6 +33,7 @@ data NCGConfig = NCGConfig
    , ncgAvxEnabled            :: !Bool
    , ncgAvx2Enabled           :: !Bool
    , ncgAvx512fEnabled        :: !Bool
+   , ncgVectorMinBits         :: Maybe Word
    , ncgBmiVersion            :: Maybe BmiVersion -- ^ (x86) BMI instructions
    , ncgDumpRegAllocStages    :: !Bool
    , ncgDumpAsmStats          :: !Bool


=====================================
compiler/GHC/Driver/Config/CmmToAsm.hs
=====================================
@@ -62,6 +62,7 @@ initNCGConfig dflags this_mod = NCGConfig
    , ncgAvxEnabled = isAvxEnabled dflags
    , ncgAvx2Enabled = isAvx2Enabled dflags
    , ncgAvx512fEnabled = isAvx512fEnabled dflags
+   , ncgVectorMinBits = vectorMinBits dflags
 
    , ncgDwarfEnabled        = osElfTarget (platformOS (targetPlatform dflags)) && debugLevel dflags > 0 && platformArch (targetPlatform dflags) /= ArchAArch64
    , ncgDwarfUnwindings     = osElfTarget (platformOS (targetPlatform dflags)) && debugLevel dflags > 0


=====================================
compiler/GHC/Driver/Session.hs
=====================================
@@ -1685,6 +1685,8 @@ dynamic_flags_deps = [
   , make_ord_flag defGhcFlag "mavx512f"     (noArg (\d -> d { avx512f = True }))
   , make_ord_flag defGhcFlag "mavx512pf"    (noArg (\d ->
                                                          d { avx512pf = True }))
+  , make_ord_flag defGhcFlag "mvector-min-width-bits"
+                                            (word64SuffixM setVectorMinBits)
   , make_ord_flag defGhcFlag "mfma"         (noArg (\d -> d { fma = True }))
 
         ------ Plugin flags ------------------------------------------------
@@ -2816,6 +2818,9 @@ intSuffixM fn = IntSuffix (\n -> updM (fn n))
 word64Suffix :: (Word64 -> DynFlags -> DynFlags) -> OptKind (CmdLineP DynFlags)
 word64Suffix fn = Word64Suffix (\n -> upd (fn n))
 
+word64SuffixM :: (Word64 -> DynFlags -> DynP DynFlags) -> OptKind (CmdLineP DynFlags)
+word64SuffixM fn = Word64Suffix (\n -> updM (fn n))
+
 floatSuffix :: (Float -> DynFlags -> DynFlags) -> OptKind (CmdLineP DynFlags)
 floatSuffix fn = FloatSuffix (\n -> upd (fn n))
 
@@ -3712,3 +3717,14 @@ updatePlatformConstants dflags mconstants = do
   let platform1 = (targetPlatform dflags) { platform_constants = mconstants }
   let dflags1   = dflags { targetPlatform = platform1 }
   return dflags1
+
+setVectorMinBits :: Word64 -> DynFlags -> DynP DynFlags
+setVectorMinBits v dflags = 
+  let validValues = [16,32,64,128,256,512]
+  in 
+    if v `elem` validValues then
+      pure $ dflags { vectorMinBits = (Just . fromIntegral) v} 
+    else do
+      addErr ("Minimal vector register size can only be one of" ++ show validValues)
+      pure dflags
+ 



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/158c705ba6815789b47819ce3df93d5240758d94

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/158c705ba6815789b47819ce3df93d5240758d94
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