[Git][ghc/ghc][wip/T23576] Implement MO_Shl in iselExpr64
Jaro Reinders (@Noughtmare)
gitlab at gitlab.haskell.org
Fri Jun 30 15:05:54 UTC 2023
Jaro Reinders pushed to branch wip/T23576 at Glasgow Haskell Compiler / GHC
Commits:
a995c3dd by Jaro Reinders at 2023-06-30T17:05:48+02:00
Implement MO_Shl in iselExpr64
- - - - -
2 changed files:
- compiler/GHC/CmmToAsm/X86/CodeGen.hs
- compiler/GHC/CmmToAsm/X86/Instr.hs
Changes:
=====================================
compiler/GHC/CmmToAsm/X86/CodeGen.hs
=====================================
@@ -642,7 +642,26 @@ iselExpr64 (CmmMachOp (MO_Mul _) [e1,e2]) = do
]
return (RegCode64 code rhi rlo)
-
+iselExpr64 (CmmMachOp (MO_Shl _) [e1,e2]) = do
+ RegCode64 code1 r1hi r1lo <- iselExpr64 e1
+ (r2, code2) <- getSomeReg e2
+ Reg64 rhi rlo <- getNewReg64
+ b <- newBlockId
+ let
+ code = code1 `appOL`
+ code2 `appOL`
+ toOL [ MOV II32 (OpReg r1lo) (OpReg rlo),
+ MOV II32 (OpReg r1hi) (OpReg rhi),
+ MOV II32 (OpReg r2) (OpReg ecx),
+ SHRD II32 (OpReg ecx) (OpReg rhi) (OpReg rlo),
+ SAR II32 (OpReg ecx) (OpReg rhi),
+ TEST II32 (OpImm (ImmInt 32)) (OpReg ecx),
+ JXX EQQ b,
+ MOV II32 (OpReg rhi) (OpReg rlo),
+ SAR II32 (OpImm (ImmInt 31)) (OpReg rhi),
+ NEWBLOCK b
+ ]
+ return (RegCode64 code rhi rlo)
iselExpr64 expr
= do
=====================================
compiler/GHC/CmmToAsm/X86/Instr.hs
=====================================
@@ -249,6 +249,7 @@ data Instr
| SHL Format Operand{-amount-} Operand
| SAR Format Operand{-amount-} Operand
| SHR Format Operand{-amount-} Operand
+ | SHRD Format Operand{-amount-} Operand Operand
| BT Format Imm Operand
| NOP
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/a995c3dd83607e50ea94f1616eae09f820a7764e
--
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/a995c3dd83607e50ea94f1616eae09f820a7764e
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