[Git][ghc/ghc][master] Minor refactorings to mkSpillInstr and mkLoadInstr

Marge Bot (@marge-bot) gitlab at gitlab.haskell.org
Thu Jun 15 07:11:55 UTC 2023



Marge Bot pushed to branch master at Glasgow Haskell Compiler / GHC


Commits:
0078dd00 by Sven Tennie at 2023-06-15T03:11:36-04:00
Minor refactorings to mkSpillInstr and mkLoadInstr

Better error messages. And, use the existing `off` constant to reduce
duplication.

- - - - -


1 changed file:

- compiler/GHC/CmmToAsm/AArch64/Instr.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/AArch64/Instr.hs
=====================================
@@ -369,13 +369,13 @@ mkSpillInstr
    -> [Instr]
 
 mkSpillInstr config reg delta slot =
-  case (spillSlotToOffset config slot) - delta of
+  case off - delta of
     imm | -256 <= imm && imm <= 255                               -> [ mkStrSp imm ]
     imm | imm > 0 && imm .&. 0x7 == 0x0 && imm <= 0xfff           -> [ mkStrSp imm ]
     imm | imm > 0xfff && imm <= 0xffffff && imm .&. 0x7 == 0x0    -> [ mkIp0SpillAddr (imm .&~. 0xfff)
                                                                      , mkStrIp0 (imm .&.  0xfff)
                                                                      ]
-    imm -> pprPanic "mkSpillInstr" (text "Unable to spill into" <+> int imm)
+    imm -> pprPanic "mkSpillInstr" (text "Unable to spill register into" <+> int imm)
     where
         a .&~. b = a .&. (complement b)
 
@@ -396,13 +396,13 @@ mkLoadInstr
    -> [Instr]
 
 mkLoadInstr config reg delta slot =
-  case (spillSlotToOffset config slot) - delta of
+  case off - delta of
     imm | -256 <= imm && imm <= 255                               -> [ mkLdrSp imm ]
     imm | imm > 0 && imm .&. 0x7 == 0x0 && imm <= 0xfff           -> [ mkLdrSp imm ]
     imm | imm > 0xfff && imm <= 0xffffff && imm .&. 0x7 == 0x0    -> [ mkIp0SpillAddr (imm .&~. 0xfff)
                                                                      , mkLdrIp0 (imm .&.  0xfff)
                                                                      ]
-    imm -> pprPanic "mkSpillInstr" (text "Unable to spill into" <+> int imm)
+    imm -> pprPanic "mkLoadInstr" (text "Unable to load spilled register at" <+> int imm)
     where
         a .&~. b = a .&. (complement b)
 



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/0078dd007535c8c81384a771e79f59efb4d5b382

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/0078dd007535c8c81384a771e79f59efb4d5b382
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