[Git][ghc/ghc][wip/T23576] Fixes

[Jaro Reinders (@Noughtmare)]

Jaro Reinders pushed to branch wip/T23576 at Glasgow Haskell Compiler / GHC


Commits:
5e7bd939 by Jaro Reinders at 2023-07-05T18:32:35+02:00
Fixes

- - - - -


2 changed files:

- compiler/GHC/CmmToAsm/X86/CodeGen.hs
- compiler/GHC/CmmToAsm/X86/Instr.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/X86/CodeGen.hs
=====================================
@@ -591,7 +591,7 @@ iselExpr64 (CmmMachOp (MO_Sub _) [e1,e2]) = do
                        SBB II32 (OpReg r2hi) (OpReg rhi) ]
    return (RegCode64 code rhi rlo)
 
-iselExpr64 (CmmMachOp (MO_UU_Conv _ W64) [expr]) = do
+iselExpr64 (CmmMachOp (MO_UU_Conv W32 W64) [expr]) = do
      code <- getAnyReg expr
      Reg64 r_dst_hi r_dst_lo <- getNewReg64
      return $ RegCode64 (code r_dst_lo `snocOL`
@@ -865,13 +865,13 @@ getRegister' _ is32Bit (CmmMachOp (MO_UU_Conv W64 W8) [x])
  | is32Bit = do
   RegCode64 code _rhi rlo <- iselExpr64 x
   ro <- getNewRegNat II8
-  return $ Fixed II8 ro (code `appOL` toOL [ MOV II8 (OpReg rlo) (OpReg ro) ])
+  return $ Fixed II8 ro (code `appOL` toOL [ MOVZxL II8 (OpReg rlo) (OpReg ro) ])
 
 getRegister' _ is32Bit (CmmMachOp (MO_UU_Conv W64 W16) [x])
  | is32Bit = do
   RegCode64 code _rhi rlo <- iselExpr64 x
   ro <- getNewRegNat II16
-  return $ Fixed II16 ro (code `appOL` toOL [ MOV II16 (OpReg rlo) (OpReg ro) ])
+  return $ Fixed II16 ro (code `appOL` toOL [ MOVZxL II16 (OpReg rlo) (OpReg ro) ])
 
 getRegister' _ _ (CmmLit lit@(CmmFloat f w)) =
   float_const_sse2  where


=====================================
compiler/GHC/CmmToAsm/X86/Instr.hs
=====================================
@@ -572,10 +572,10 @@ patchRegsOfInstr instr env
     BSWAP fmt reg        -> BSWAP fmt (env reg)
     NEGI fmt op          -> patch1 (NEGI fmt) op
     SHL  fmt imm dst     -> patch1 (SHL fmt imm) dst
-    SAL  fmt imm dst     -> patch1 (SAR fmt imm) dst
+    SAL  fmt imm dst     -> patch1 (SAL fmt imm) dst
     SAR  fmt imm dst     -> patch1 (SAR fmt imm) dst
     SHR  fmt imm dst     -> patch1 (SHR fmt imm) dst
-    SHLD fmt imm dst1 dst2 -> patch2 (SHRD fmt imm) dst1 dst2
+    SHLD fmt imm dst1 dst2 -> patch2 (SHLD fmt imm) dst1 dst2
     SHRD fmt imm dst1 dst2 -> patch2 (SHRD fmt imm) dst1 dst2
     BT   fmt imm src     -> patch1 (BT  fmt imm) src
     TEST fmt src dst     -> patch2 (TEST fmt) src dst



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/5e7bd939f0c709911b7176e47ee0a602999b4e5a

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/5e7bd939f0c709911b7176e47ee0a602999b4e5a
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