[Git][ghc/ghc][master] nativeGen/X86: MFENCE is unnecessary for release semantics

Marge Bot (@marge-bot) gitlab at gitlab.haskell.org
Thu Jan 19 03:25:47 UTC 2023



Marge Bot pushed to branch master at Glasgow Haskell Compiler / GHC


Commits:
f058e367 by Ben Gamari at 2023-01-18T22:25:27-05:00
nativeGen/X86: MFENCE is unnecessary for release semantics

In #22764 a user noticed that a program implementing a simple atomic
counter via an STRef regressed significantly due to the introduction of
necessary atomic operations in the MutVar# primops (#22468). This
regression was caused by a bug in the NCG, which emitted an unnecessary
MFENCE instruction for a release-ordered atomic write. MFENCE is rather
only needed to achieve sequentially consistent ordering.

Fixes #22764.

- - - - -


1 changed file:

- compiler/GHC/CmmToAsm/X86/CodeGen.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/X86/CodeGen.hs
=====================================
@@ -3936,7 +3936,7 @@ genAtomicWrite width mord addr val = do
   code <- assignMem_IntCode (intFormat width) addr val
   let needs_fence = case mord of
         MemOrderSeqCst  -> True
-        MemOrderRelease -> True
+        MemOrderRelease -> False
         MemOrderAcquire -> pprPanic "genAtomicWrite: acquire ordering on write" empty
         MemOrderRelaxed -> False
   return $ if needs_fence then code `snocOL` MFENCE else code



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/f058e3672b969f301b6b1637f8ab081654ec947a

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/f058e3672b969f301b6b1637f8ab081654ec947a
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