[Git][ghc/ghc][wip/supersven/riscv64-ncg] Sign-extend branche conditionals W32 -> W64

Sven Tennie (@supersven) gitlab at gitlab.haskell.org
Wed Dec 6 19:08:00 UTC 2023



Sven Tennie pushed to branch wip/supersven/riscv64-ncg at Glasgow Haskell Compiler / GHC


Commits:
f8065a34 by Sven Tennie at 2023-12-06T20:06:10+01:00
Sign-extend branche conditionals W32 -> W64

Otherwise, negative ints are used as positive ints.

- - - - -


1 changed file:

- compiler/GHC/CmmToAsm/RV64/CodeGen.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/RV64/CodeGen.hs
=====================================
@@ -1266,6 +1266,7 @@ genCondJump bid expr = do
               (reg_y, format_y, code_y) <- getSomeReg y
               let x' = OpReg w reg_x
                   y' = OpReg w reg_y
+              -- TODO: Reduce duplication in this block.
               return $ case w of
                 W8 ->
                   code_x
@@ -1279,6 +1280,12 @@ genCondJump bid expr = do
                     `appOL` code_y
                     `appOL` signExtend (formatToWidth format_y) W64 reg_y reg_y
                     `appOL` unitOL (annExpr expr (BCOND cmp x' y' (TBlock bid)))
+                W32 ->
+                  code_x
+                    `appOL` signExtend (formatToWidth format_x) W64 reg_x reg_x
+                    `appOL` code_y
+                    `appOL` signExtend (formatToWidth format_y) W64 reg_y reg_y
+                    `appOL` unitOL (annExpr expr (BCOND cmp x' y' (TBlock bid)))
                 _ -> code_x `appOL` code_y `appOL` unitOL (annExpr expr (BCOND cmp x' y' (TBlock bid)))
 
             fbcond w cmp = do



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/f8065a34de2e9d01e3bf7507b0e4860ebcd9bc21

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/f8065a34de2e9d01e3bf7507b0e4860ebcd9bc21
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