[Git][ghc/ghc][wip/andreask/xchg_primop] Make XCHG a Op, Reg instr as it should be

[Andreas Klebinger]

Andreas Klebinger pushed to branch wip/andreask/xchg_primop at Glasgow Haskell Compiler / GHC


Commits:
f2b661a6 by Andreas Klebinger at 2020-05-15T15:40:30+02:00
Make XCHG a Op,Reg instr as it should be

- - - - -


3 changed files:

- compiler/GHC/CmmToAsm/X86/CodeGen.hs
- compiler/GHC/CmmToAsm/X86/Instr.hs
- compiler/GHC/CmmToAsm/X86/Ppr.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/X86/CodeGen.hs
=====================================
@@ -2518,22 +2518,20 @@ genCCall' _ is32Bit (PrimTarget (MO_Cmpxchg width)) [dst] [addr, old, new] _ = d
   where
     format = intFormat width
 
-genCCall' dflags is32Bit (PrimTarget MO_Xchg) [dst] [addr, value] _ = do
-    Amode amode addr_code <- getSimpleAmode dflags is32Bit addr
-    newval <- getNewRegNat format
-    newval_code <- getAnyReg value
-    let platform = targetPlatform dflags
-        dst_r    = getRegisterReg platform (CmmLocal dst)
-        code     = toOL
-                   [ MOV format (OpReg newval) (OpReg eax)
-                   , LOCK (XCHG format (OpReg eax) (OpAddr amode))
-                   , MOV format (OpReg eax) (OpReg dst_r)
+genCCall' config is32Bit (PrimTarget MO_Xchg) [dst] [addr, value] _ = do
+    let dst_r = getRegisterReg platform (CmmLocal dst)
+    Amode amode addr_code <- getSimpleAmode is32Bit addr
+    (newval, newval_code) <- getSomeReg value
+    let code     = toOL
+                   [ MOV format (OpReg newval) (OpReg dst_r)
+                   , XCHG format (OpAddr amode) dst_r
                    ]
-    return $ addr_code `appOL` newval_code newval `appOL` code
+    return $ addr_code `appOL` newval_code `appOL` code
   where
     format = intFormat width
     width | is32Bit   = W32
           | otherwise = W64
+    platform = ncgPlatform config
 
 genCCall' _ is32Bit target dest_regs args bid = do
   platform <- ncgPlatform <$> getConfig


=====================================
compiler/GHC/CmmToAsm/X86/Instr.hs
=====================================
@@ -329,7 +329,7 @@ data Instr
         | LOCK        Instr -- lock prefix
         | XADD        Format Operand Operand -- src (r), dst (r/m)
         | CMPXCHG     Format Operand Operand -- src (r), dst (r/m), eax implicit
-        | XCHG        Format Operand Operand -- src (r), dst (r/m)
+        | XCHG        Format Operand Reg     -- src (r/m), dst (r/m)
         | MFENCE
 
 data PrefetchVariant = NTA | Lvl0 | Lvl1 | Lvl2
@@ -432,7 +432,7 @@ x86_regUsageOfInstr platform instr
     LOCK i              -> x86_regUsageOfInstr platform i
     XADD _ src dst      -> usageMM src dst
     CMPXCHG _ src dst   -> usageRMM src dst (OpReg eax)
-    XCHG _ src dst      -> usageRMM src dst (OpReg eax)
+    XCHG _ src dst      -> usageMM src (OpReg dst)
     MFENCE -> noUsage
 
     _other              -> panic "regUsage: unrecognised instr"
@@ -591,7 +591,7 @@ x86_patchRegsOfInstr instr env
     LOCK i               -> LOCK (x86_patchRegsOfInstr i env)
     XADD fmt src dst     -> patch2 (XADD fmt) src dst
     CMPXCHG fmt src dst  -> patch2 (CMPXCHG fmt) src dst
-    XCHG fmt src dst     -> patch2 (XCHG fmt) src dst
+    XCHG fmt src dst     -> XCHG fmt (patchOp src) (env dst)
     MFENCE               -> instr
 
     _other              -> panic "patchRegs: unrecognised instr"


=====================================
compiler/GHC/CmmToAsm/X86/Ppr.hs
=====================================
@@ -825,7 +825,7 @@ pprInstr platform i = case i of
       -> pprCondInstr (sLit "set") cond (pprOperand platform II8 op)
 
    (XCHG format src val)
-      -> pprFormatOpOp (sLit "xchg") format src val
+      -> pprFormatOpReg (sLit "xchg") format src val
 
    JXX cond blockid
       -> pprCondInstr (sLit "j") cond (ppr lab)



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/f2b661a69f5fac51d7f7defc374d363006717362

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/f2b661a69f5fac51d7f7defc374d363006717362
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