[Git][ghc/ghc][wip/angerman/aarch64-ncg] Add latest opt changes.

[Moritz Angermann]

Moritz Angermann pushed to branch wip/angerman/aarch64-ncg at Glasgow Haskell Compiler / GHC


Commits:
27ea955b by Moritz Angermann at 2020-07-11T13:36:56+00:00
Add latest opt changes.

- - - - -


1 changed file:

- compiler/GHC/CmmToAsm/AArch64/CodeGen.hs


Changes:

=====================================
compiler/GHC/CmmToAsm/AArch64/CodeGen.hs
=====================================
@@ -601,16 +601,20 @@ getRegister' config plat expr
     -- XXX: for now we'll only implement the 64bit versions. And rely on the
     --      fallthrough to alert us if things go wrong!
     -- OPTIMIZATION WARNING: Dyadic CmmMachOp destructuring
+    -- 0. XXX This should not exist! Rewrite: Reg +- 0 -> Reg
+    CmmMachOp (MO_Add _) [expr'@(CmmReg (CmmGlobal r)), CmmLit (CmmInt 0 _)] -> getRegister' config plat expr'
+    CmmMachOp (MO_Sub _) [expr'@(CmmReg (CmmGlobal r)), CmmLit (CmmInt 0 _)] -> getRegister' config plat expr'
     -- 1. Compute Reg +/- n directly.
     --    For Add/Sub we can directly encode 12bits, or 12bits lsl #12.
-    CmmMachOp (MO_Add _) [(CmmReg (CmmGlobal r)), CmmLit (CmmInt 0 _)] -> pprPanic "getRegister:CmmMachOp:Add:Imm is 0" (ppr expr)
     CmmMachOp (MO_Add w) [(CmmReg reg@(CmmGlobal _)), CmmLit (CmmInt n _)]
       | n > 0 && n < 4096 -> return $ Any (intFormat w) (\d -> unitOL $ ANN (text $ show expr) (ADD (OpReg w d) (OpReg w' r') (OpImm (ImmInteger n))))
+      -- XXX: 12bits lsl #12; e.g. lower 12 bits of n are 0; shift n >> 12, and set lsl to #12.
       -- OPTIMIZATION WARNING: This only works because reg is CmmGlobal
       where w' = formatToWidth (cmmTypeFormat (cmmRegType plat reg))
             r' = getRegisterReg plat reg
     CmmMachOp (MO_Sub w) [(CmmReg reg@(CmmGlobal _)), CmmLit (CmmInt n _)]
       | n > 0 && n < 4096 -> return $ Any (intFormat w) (\d -> unitOL $ ANN (text $ show expr) (SUB (OpReg w d) (OpReg w' r') (OpImm (ImmInteger n))))
+      -- XXX: 12bits lsl #12; e.g. lower 12 bits of n are 0; shift n >> 12, and set lsl to #12.
       -- OPTIMIZATION WARNING: This only works because reg is CmmGlobal
       where w' = formatToWidth (cmmTypeFormat (cmmRegType plat reg))
             r' = getRegisterReg plat reg



View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/27ea955ba4ed6d547ac86428bbe95272652a48dc

-- 
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/27ea955ba4ed6d547ac86428bbe95272652a48dc
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