[commit: ghc] wip/T13633: RTS: Add missing memory barrier (eafa6ab)

[git at git.haskell.org]

Repository : ssh://git@git.haskell.org/ghc

On branch  : wip/T13633
Link       : http://ghc.haskell.org/trac/ghc/changeset/eafa6ab26a06bfc006b048021a7611d54a2ef7d8/ghc

>---------------------------------------------------------------

commit eafa6ab26a06bfc006b048021a7611d54a2ef7d8
Author: Peter Trommler <ptrommler at acm.org>
Date:   Sun Feb 24 17:11:00 2019 +0100

    RTS: Add missing memory barrier


>---------------------------------------------------------------

eafa6ab26a06bfc006b048021a7611d54a2ef7d8
 rts/WSDeque.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/rts/WSDeque.c b/rts/WSDeque.c
index b9393b1..9502df0 100644
--- a/rts/WSDeque.c
+++ b/rts/WSDeque.c
@@ -195,7 +195,9 @@ stealWSDeque_ (WSDeque *q)
     if ((long)b - (long)t <= 0 ) {
         return NULL; /* already looks empty, abort */
   }
-
+    // NB. these loads must be ordered so writes from pushWSDeque
+    // will be seen.
+    load_load_barrier();
     /* now access array, see pushBottom() */
     stolen = q->elements[t & q->moduloSize];