[commit: ghc] wip/angerman/llvmng: Add Pdep and Pext primops. (b1620eb)
git at git.haskell.org
git at git.haskell.org
Sat Nov 18 15:24:51 UTC 2017
Repository : ssh://git@git.haskell.org/ghc
On branch : wip/angerman/llvmng
Link : http://ghc.haskell.org/trac/ghc/changeset/b1620eb5dbc8034d8d33f4989b7d33a953e8d2aa/ghc
>---------------------------------------------------------------
commit b1620eb5dbc8034d8d33f4989b7d33a953e8d2aa
Author: Moritz Angermann <moritz.angermann at gmail.com>
Date: Sat Nov 18 17:45:26 2017 +0800
Add Pdep and Pext primops.
Were introduced in f5dc8ccc
>---------------------------------------------------------------
b1620eb5dbc8034d8d33f4989b7d33a953e8d2aa
compiler/llvmGen-ng/Data/BitCode/LLVM/Gen.hs | 37 ++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/compiler/llvmGen-ng/Data/BitCode/LLVM/Gen.hs b/compiler/llvmGen-ng/Data/BitCode/LLVM/Gen.hs
index c1c9e8c..4222dbd 100644
--- a/compiler/llvmGen-ng/Data/BitCode/LLVM/Gen.hs
+++ b/compiler/llvmGen-ng/Data/BitCode/LLVM/Gen.hs
@@ -888,6 +888,43 @@ genCall blockMap regMap target dsts args = case target of
ty <- EDSL.deptr (EDSL.ty slot)
EDSL.store slot =<< cast ty ret
| otherwise -> panic "genCall: PopCnt not implemented."
+ (PrimTarget (MO_Pdep w))
+ | ([dst], [src, mask]) <- (dsts, args) -> do
+ slot <- lookupLocalReg dst regMap
+
+ src' <- bind2 cast (EDSL.i (widthInBits w)) (exprToVar blockMap regMap src)
+ mask' <- bind2 cast (EDSL.i (widthInBits w)) (exprToVar blockMap regMap mask)
+
+ arch <- platformArch . targetPlatform <$> getDynFlags
+ f <- let w' = widthInBits w
+ fn = case arch of
+ ArchX86_64 -> "llvm.x86.bmi.pdep."
+ _ -> "hs_pdep"
+ in EDSL.fun (fn ++ show w') =<< [ EDSL.i w', EDSL.i w' ] --> EDSL.i w'
+
+ Just ret <- EDSL.ccall f [ src', mask' ]
+ ty <- EDSL.deptr (EDSL.ty slot)
+ EDSL.store slot =<< cast ty ret
+ | otherwise -> panic "genCall: Pdep not implemented."
+ (PrimTarget (MO_Pext w))
+ | ([dst], [src, mask]) <- (dsts, args) -> do
+ slot <- lookupLocalReg dst regMap
+
+ src' <- bind2 cast (EDSL.i (widthInBits w)) (exprToVar blockMap regMap src)
+ mask' <- bind2 cast (EDSL.i (widthInBits w)) (exprToVar blockMap regMap mask)
+
+ arch <- platformArch . targetPlatform <$> getDynFlags
+
+ f <- let w' = widthInBits w
+ fn = case arch of
+ ArchX86_64 -> "llvm.x86.bmi.pext."
+ _ -> "hs_pext"
+ in EDSL.fun (fn ++ show w') =<< [ EDSL.i w', EDSL.i w' ] --> EDSL.i w'
+
+ Just ret <- EDSL.ccall f [ src', mask' ]
+ ty <- EDSL.deptr (EDSL.ty slot)
+ EDSL.store slot =<< cast ty ret
+ | otherwise -> panic "genCall: Pext not implemented."
(PrimTarget (MO_Clz w))
| ([dst], [e]) <- (dsts, args) -> do
slot <- lookupLocalReg dst regMap
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