[commit: ghc] ghc-8.0: Linker: ARM: Don't change to BLX if jump needed veneer (7210976)

[git at git.haskell.org]

Repository : ssh://git@git.haskell.org/ghc

On branch  : ghc-8.0
Link       : http://ghc.haskell.org/trac/ghc/changeset/7210976bb2a566c7101ea315630384c3659719ee/ghc

>---------------------------------------------------------------

commit 7210976bb2a566c7101ea315630384c3659719ee
Author: Ben Gamari <ben at smart-cactus.org>
Date:   Mon Jan 4 01:39:39 2016 +0100

    Linker: ARM: Don't change to BLX if jump needed veneer
    
    Since we produce ARM veneer.
    
    (cherry picked from commit 04f3524f787b2cbd3f460e058c753529d3f2f7ac)


>---------------------------------------------------------------

7210976bb2a566c7101ea315630384c3659719ee
 rts/Linker.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/rts/Linker.c b/rts/Linker.c
index e6f63cb..6561e05 100644
--- a/rts/Linker.c
+++ b/rts/Linker.c
@@ -5137,7 +5137,8 @@ do_Elf_Rel_relocations ( ObjectCode* oc, char* ehdrC,
             const StgBool overflow = !is_int(26, (StgInt32) result);
 
             // Handle overflow and Thumb interworking
-            if ((is_target_thm && ELF_R_TYPE(info) == R_ARM_JUMP24) || overflow) {
+            const StgBool needs_veneer = (is_target_thm && ELF_R_TYPE(info) == R_ARM_JUMP24) || overflow;
+            if (needs_veneer) {
                // Generate veneer
                // The +8 below is to undo the PC-bias compensation done by the object producer
                SymbolExtra *extra = makeArmSymbolExtra(oc, ELF_R_SYM(info), S+imm+8, 0, is_target_thm);
@@ -5151,12 +5152,14 @@ do_Elf_Rel_relocations ( ObjectCode* oc, char* ehdrC,
                }
             }
 
+            // Update the branch target
             const StgWord32 imm24 = (result & 0x03fffffc) >> 2;
             *word = (*word & ~0x00ffffff)
                   | (imm24 & 0x00ffffff);
 
+            // Change the relocated branch into a BLX if necessary
             const StgBool switch_mode = is_target_thm && (reloc_type == R_ARM_CALL);
-            if (switch_mode) {
+            if (!needs_veneer && switch_mode) {
                const StgWord32 hBit = (result & 0x2) >> 1;
                // Change instruction to BLX
                *word = (*word & ~0xFF000000) | ((0xfa | hBit) << 24);