[commit: ghc] master: Fix typos (8e02c0a)
Gabor Greif
ggreif at gmail.com
Sun Apr 7 22:35:57 CEST 2013
Repository : http://darcs.haskell.org/ghc.git/
On branch : master
https://github.com/ghc/ghc/commit/8e02c0a594c6e5dc4208d8247a78bd4ce2d423e5
>---------------------------------------------------------------
commit 8e02c0a594c6e5dc4208d8247a78bd4ce2d423e5
Author: Gabor Greif <ggreif at gmail.com>
Date: Sun Apr 7 21:36:11 2013 +0200
Fix typos
>---------------------------------------------------------------
compiler/nativeGen/RegAlloc/Liveness.hs | 6 +++---
compiler/nativeGen/SPARC/CodeGen.hs | 4 ++--
compiler/nativeGen/SPARC/CodeGen/Gen64.hs | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/compiler/nativeGen/RegAlloc/Liveness.hs b/compiler/nativeGen/RegAlloc/Liveness.hs
index f49155e..41efa18 100644
--- a/compiler/nativeGen/RegAlloc/Liveness.hs
+++ b/compiler/nativeGen/RegAlloc/Liveness.hs
@@ -2,7 +2,7 @@
--
-- The register liveness determinator
--
--- (c) The University of Glasgow 2004
+-- (c) The University of Glasgow 2004-2013
--
-----------------------------------------------------------------------------
module RegAlloc.Liveness (
@@ -423,7 +423,7 @@ slurpReloadCoalesce live
, slotMap' <- addToUFM slotMap slot reg
= return (slotMap', Nothing)
- -- add an edge betwen the this reg and the last one stored into the slot
+ -- add an edge between the this reg and the last one stored into the slot
| LiveInstr (RELOAD slot reg) _ <- li
= case lookupUFM slotMap slot of
Just reg2
@@ -594,7 +594,7 @@ patchEraseLive patchF cmm
-- source and destination regs are the same
| r1 == r2 = True
- -- desination reg is never used
+ -- destination reg is never used
| elementOfUniqSet r2 (liveBorn live)
, elementOfUniqSet r2 (liveDieRead live) || elementOfUniqSet r2 (liveDieWrite live)
= True
diff --git a/compiler/nativeGen/SPARC/CodeGen.hs b/compiler/nativeGen/SPARC/CodeGen.hs
index c6497e1..30ffcd9 100644
--- a/compiler/nativeGen/SPARC/CodeGen.hs
+++ b/compiler/nativeGen/SPARC/CodeGen.hs
@@ -2,7 +2,7 @@
--
-- Generating machine code (instruction selection)
--
--- (c) The University of Glasgow 1996-2004
+-- (c) The University of Glasgow 1996-2013
--
-----------------------------------------------------------------------------
@@ -538,7 +538,7 @@ move_final (v:vs) (a:az) offset
-- | Assign results returned from the call into their
--- desination regs.
+-- destination regs.
--
assign_code :: Platform -> [LocalReg] -> OrdList Instr
diff --git a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
index 7b39a37..a7532e1 100644
--- a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
+++ b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
@@ -36,7 +36,7 @@ import Outputable
-- | Code to assign a 64 bit value to memory.
assignMem_I64Code
- :: CmmExpr -- ^ expr producing the desination address
+ :: CmmExpr -- ^ expr producing the destination address
-> CmmExpr -- ^ expr producing the source value.
-> NatM InstrBlock
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