[commit: ghc] wip/simd: Enable passing vector arguments in xmm registers on x86-32. (d6d591a)

[git at git.haskell.org]

Repository : ssh://git@git.haskell.org/ghc

On branch  : wip/simd
Link       : http://ghc.haskell.org/trac/ghc/changeset/d6d591acd21cd6960202da89df13ab141d6982c1/ghc

>---------------------------------------------------------------

commit d6d591acd21cd6960202da89df13ab141d6982c1
Author: Geoffrey Mainland <mainland at apeiron.net>
Date:   Thu Aug 8 15:59:42 2013 +0100

    Enable passing vector arguments in xmm registers on x86-32.
    
    Note that this will only work with the LLVM back end pending LLVM patches to
    change the GHC calling convention appropriately.


>---------------------------------------------------------------

d6d591acd21cd6960202da89df13ab141d6982c1
 includes/stg/MachRegs.h |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/includes/stg/MachRegs.h b/includes/stg/MachRegs.h
index a8f2215..fa39a5a 100644
--- a/includes/stg/MachRegs.h
+++ b/includes/stg/MachRegs.h
@@ -103,11 +103,16 @@
 # define REG_Hp     edi
 #endif
 
+#define REG_XMM1    xmm0
+#define REG_XMM2    xmm1
+#define REG_XMM3    xmm2
+#define REG_XMM4    xmm3
+
 #define MAX_REAL_VANILLA_REG 1  /* always, since it defines the entry conv */
 #define MAX_REAL_FLOAT_REG   0
 #define MAX_REAL_DOUBLE_REG  0
 #define MAX_REAL_LONG_REG    0
-#define MAX_REAL_XMM_REG     0
+#define MAX_REAL_XMM_REG     4
 
 /* -----------------------------------------------------------------------------
   The x86-64 register mapping