[GHC] #8680: In STM: Variables only in left branch of orElse can invalidate the right branch transaction

[GHC]

#8680: In STM: Variables only in left branch of orElse can invalidate the right
branch transaction
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        Reporter:  jberryman                |            Owner:
            Type:  bug                      |           Status:  new
        Priority:  normal                   |        Milestone:
       Component:  Compiler                 |          Version:  7.6.3
      Resolution:                           |         Keywords:
Operating System:  Unknown/Multiple         |     Architecture:
 Type of failure:  Runtime performance bug  |  Unknown/Multiple
       Test Case:                           |       Difficulty:  Unknown
        Blocking:                           |       Blocked By:
                                            |  Related Tickets:
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Comment (by ezyang):

 I haven't checked your program, but what you have textually described is
 the behavior I would expect for orElse (and is consistent with the
 semantics): the 'else' branch is only valid if the 'if' branch retries; so
 if the first branch is invalidated, it may not be retrying anymore.

 This suggests there might be a useful nondeterministic version of orElse,
 which relaxes this restriction.

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Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/8680#comment:2>
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