<div dir="ltr"><div>yeah, like, currently the XOR for setting registers to zero trick / code optimization (first implemented in ghc backend by reid barton) is done as part of the pretty printer on X86/AMD_64 targets</div><div><br></div><div>this and a lot of other easy win peephole optimizations that are platform /target dependent happen in the pretty printer atm I thnk<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Oct 28, 2021 at 5:38 PM Ben Gamari <<a href="mailto:ben@smart-cactus.org">ben@smart-cactus.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Norman Ramsey <<a href="mailto:nr@cs.tufts.edu" target="_blank">nr@cs.tufts.edu</a>> writes:<br>
<br>
> On x86, GHC can translate 8-bit and 16-bit operations directly<br>
> into the 8-bit and 16-bit machine instructions that the hardware<br>
> supports. But there are other platforms on which the smallest<br>
> unit of arithmetic may be 32 or even 64 bits. Is there a central<br>
> module in GHC that can take care of rewriting 8-bit and 16-bit operations<br>
> into 32-bit or 64-bit operations? Or is each back end on its own<br>
> for this?<br>
><br>
> (One of my students did some nice work on implementing this transformation<br>
> with a minimal set of sign-extension and zero-extension operations:<br>
> <a href="https://www.cs.tufts.edu/~nr/pubs/widen.pdf" rel="noreferrer" target="_blank">https://www.cs.tufts.edu/~nr/pubs/widen.pdf</a>.)<br>
><br>
As Carter indicated, this is currently done on a per-backend basis. This<br>
could indeed probably be consolidated, although we would want to make<br>
sure that in so doing we do not leave easy money on the table: It seems<br>
plausible to me that the backend may be able to generate better code<br>
than a naive lowering to wide arithmetic might otherwise generate.<br>
<br>
Cheers,<br>
<br>
- Ben<br>
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</blockquote></div>