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<h3 style="margin-top: 20px; margin-bottom: 10px;">
sheaf pushed to branch wip/ncg-simd at <a href="https://gitlab.haskell.org/ghc/ghc">Glasgow Haskell Compiler / GHC</a>
</h3>
<h4 style="margin-top: 10px; margin-bottom: 10px;">
Commits:
</h4>
<ul>
<li>
<strong style="font-weight: bold;"><a href="https://gitlab.haskell.org/ghc/ghc/-/commit/6d74a06d36b9b8cb4dec1fcb9668efe387bac501">6d74a06d</a></strong>
<div>
<span> by sheaf </span> <i> at 2024-06-27T12:19:43+02:00 </i>
</div>
<pre class="commit-message" style='white-space: pre-wrap; display: block; font-size: 14px; color: #333238; position: relative; font-family: var(--default-mono-font, "GitLab Mono"),"JetBrains Mono","Menlo","DejaVu Sans Mono","Liberation Mono","Consolas","Ubuntu Mono","Courier New","andale mono","lucida console",monospace; word-break: break-all; word-wrap: break-word; background-color: #fbfafd; border-radius: 2px; margin: 0; padding: 8px 12px; border: 1px solid #dcdcde;'>The X86 SIMD patch.
This commit adds support for 128 bit wide SIMD vectors and vector
operations to GHC's X86 native code generator.
Main changes:
- Introduction of vector formats (`GHC.CmmToAsm.Format`)
- Introduction of 128-bit virtual register (`GHC.Platform.Reg`),
and removal of unused Float virtual register.
- Refactor of `GHC.Platform.Reg.Class.RegClass`: it now only contains
two classes, `RcInteger` (for general purpose registers) and `RcFloatOrVector`
(for registers that can be used for scalar floating point values as well
as vectors).
- Modify `GHC.CmmToAsm.X86.Instr.regUsageOfInstr` to keep track
of which format each register is used at, so that the register
allocator can know if it needs to spill the entire vector register
or just the lower 64 bits.
- Modify spill/load/reg-2-reg code to account for vector registers
(`GHC.CmmToAsm.X86.Instr.{mkSpillInstr, mkLoadInstr, mkRegRegMoveInstr, takeRegRegMoveInstr}`).
- Modify the register allocator code (`GHC.CmmToAsm.Reg.*`) to propagate
the format we are storing in any given register, for instance changing
`Reg` to `RegFormat` or `GlobalReg` to `GlobalRegUse`.
- Add logic to lower vector `MachOp`s to X86 assembly
(see `GHC.CmmToAsm.X86.CodeGen`)
- Minor cleanups to genprimopcode, to remove the llvm_only attribute
which is no longer applicable.
Tests for this feature are provided in the "testsuite/tests/simd" directory.
Fixes #7741
Keeping track of register formats adds a small memory overhead to the
register allocator (in particular, regUsageOfInstr now allocates more
to keep track of the `Format` each register is used at). This explains
the following metric increases.
-------------------------
Metric Increase:
T12707
T13035
T13379
T3294
T4801
T5321FD
T5321Fun
T783
-------------------------
</pre>
</li>
<li>
<strong style="font-weight: bold;"><a href="https://gitlab.haskell.org/ghc/ghc/-/commit/f59cc01871dc743346303fdcd9864c6d461e55b1">f59cc018</a></strong>
<div>
<span> by sheaf </span> <i> at 2024-06-27T12:19:44+02:00 </i>
</div>
<pre class="commit-message" style='white-space: pre-wrap; display: block; font-size: 14px; color: #333238; position: relative; font-family: var(--default-mono-font, "GitLab Mono"),"JetBrains Mono","Menlo","DejaVu Sans Mono","Liberation Mono","Consolas","Ubuntu Mono","Courier New","andale mono","lucida console",monospace; word-break: break-all; word-wrap: break-word; background-color: #fbfafd; border-radius: 2px; margin: 0; padding: 8px 12px; border: 1px solid #dcdcde;'>Add vector fused multiply-add operations
This commit adds fused multiply add operations such as `fmaddDoubleX2#`.
These are handled both in the X86 NCG and the LLVM backends.
</pre>
</li>
<li>
<strong style="font-weight: bold;"><a href="https://gitlab.haskell.org/ghc/ghc/-/commit/7d547a9cdc683486e95810035e93f315c914d9cf">7d547a9c</a></strong>
<div>
<span> by sheaf </span> <i> at 2024-06-27T12:21:29+02:00 </i>
</div>
<pre class="commit-message" style='white-space: pre-wrap; display: block; font-size: 14px; color: #333238; position: relative; font-family: var(--default-mono-font, "GitLab Mono"),"JetBrains Mono","Menlo","DejaVu Sans Mono","Liberation Mono","Consolas","Ubuntu Mono","Courier New","andale mono","lucida console",monospace; word-break: break-all; word-wrap: break-word; background-color: #fbfafd; border-radius: 2px; margin: 0; padding: 8px 12px; border: 1px solid #dcdcde;'>Add vector shuffle primops
This adds vector shuffle primops, such as
```
shuffleFloatX4# :: FloatX4# -> FloatX4# -> (# Int#, Int#, Int#, Int# #) -> FloatX4#
```
which shuffle the components of the input two vectors into the output vector.
NB: the indices must be compile time literals, to match the X86 SHUFPD
instruction immediate and the LLVM shufflevector instruction.
These are handled in the X86 NCG and the LLVM backend.
Tested in simd009.
</pre>
</li>
<li>
<strong style="font-weight: bold;"><a href="https://gitlab.haskell.org/ghc/ghc/-/commit/1fc97ecfb9c113d1fc5ea9e9af192f4b5984b791">1fc97ecf</a></strong>
<div>
<span> by sheaf </span> <i> at 2024-06-27T12:21:29+02:00 </i>
</div>
<pre class="commit-message" style='white-space: pre-wrap; display: block; font-size: 14px; color: #333238; position: relative; font-family: var(--default-mono-font, "GitLab Mono"),"JetBrains Mono","Menlo","DejaVu Sans Mono","Liberation Mono","Consolas","Ubuntu Mono","Courier New","andale mono","lucida console",monospace; word-break: break-all; word-wrap: break-word; background-color: #fbfafd; border-radius: 2px; margin: 0; padding: 8px 12px; border: 1px solid #dcdcde;'>Add Broadcast MachOps
This adds proper MachOps for broadcast instructions, allowing us to
produce better code for broadcasting a value than simply packing that
value (doing many vector insertions in a row).
These are lowered in the X86 NCG and LLVM backends. In the LLVM backend,
it uses the previously introduced shuffle instructions.
</pre>
</li>
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<h4 style="margin-top: 10px; margin-bottom: 10px;">
30 changed files:
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<a href="#451725cc4e5d443a3b7c2adcdf224840f953b7e2">
compiler/GHC/Builtin/primops.txt.pp
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<li class="file-stats">
<a href="#f73a4fa90a8eb153bccdcfcc9f63c15edcd66785">
compiler/GHC/Cmm.hs
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<a href="#d088ba20f051734394bf7ca283f33ed8127bc8ab">
compiler/GHC/Cmm/CallConv.hs
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<a href="#29368208fbfcaee57ce84000cdccaba639e85a75">
compiler/GHC/Cmm/Graph.hs
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<a href="#95111d27913460e138e20c87f610b61c3745ab2b">
compiler/GHC/Cmm/Liveness.hs
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<a href="#c898e00d01234ab22d3b485be68db3645f52f220">
compiler/GHC/Cmm/MachOp.hs
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<a href="#90378e83c3a00a78bc0b3c01da111e0a787de451">
compiler/GHC/Cmm/Node.hs
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<a href="#00c27365316e033b00cc3ed3854ac8714d25a2b5">
compiler/GHC/Cmm/Opt.hs
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<a href="#71e696f452eb493722d70306c6f304fc9b2f6a95">
compiler/GHC/Cmm/Parser.y
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<a href="#29a1593e7281c8a9103a19e3a7562e2365e23b47">
compiler/GHC/Cmm/ProcPoint.hs
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<a href="#e6d1631f6489247960af7cf2a444f14f538f255a">
compiler/GHC/Cmm/Reg.hs
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<a href="#b1390f6749e1a2dddcae35f88d55623ea6269f56">
compiler/GHC/Cmm/Sink.hs
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<a href="#10b61652f9817945bb54ccf8fc40f8a664ca3c30">
compiler/GHC/CmmToAsm.hs
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<a href="#b9a8759892098a78ba40db9b2ef9cbc3ddc91fe2">
compiler/GHC/CmmToAsm/AArch64.hs
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<a href="#6997a0cd37829d3d08db1c48185aaa3d7dfc3e6b">
compiler/GHC/CmmToAsm/AArch64/CodeGen.hs
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<a href="#807babf5b215890881c92043bcd08486141a405c">
compiler/GHC/CmmToAsm/AArch64/Instr.hs
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<a href="#0c06b80d12937afa0db5ee9903e4d2be2f146d29">
compiler/GHC/CmmToAsm/AArch64/Ppr.hs
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<a href="#7cfe1a34e0b670dd84416b177237fa11a01b43da">
compiler/GHC/CmmToAsm/AArch64/Regs.hs
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<a href="#7223682bb3d11ed5bc80db47627d3d9ef7fa2ac7">
compiler/GHC/CmmToAsm/Config.hs
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<a href="#ae99eae1604521f8f6ef391c4ebab468f68d3cec">
compiler/GHC/CmmToAsm/Format.hs
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<a href="#ee14f325b8d394d681c0d3c18a3477016d1092ef">
compiler/GHC/CmmToAsm/Instr.hs
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<a href="#3d7cf85300f30f607d67d8ef76ca24630199e989">
compiler/GHC/CmmToAsm/PPC.hs
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<a href="#f71fa75baa7807186473f09c45a9ada1b72f4c6c">
compiler/GHC/CmmToAsm/PPC/CodeGen.hs
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<a href="#89f8a68c62e7b5e239f8d8d532820fc086d29140">
compiler/GHC/CmmToAsm/PPC/Instr.hs
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<a href="#3022d7d8a06ba257d13bbd18a3347522287aa684">
compiler/GHC/CmmToAsm/PPC/Ppr.hs
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<a href="#c386b75e4b289cb23bf547322b74c30941596bae">
compiler/GHC/CmmToAsm/PPC/Regs.hs
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<a href="#eb63fd2d9f8f64c1063f9ce3e162f92c2e6e508c">
compiler/GHC/CmmToAsm/Reg/Graph.hs
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<a href="#b5d9809f48ef349a168fb08742fa95fb2a059129">
compiler/GHC/CmmToAsm/Reg/Graph/Coalesce.hs
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<a href="#02f4cb4badaefd6ed6f1ae3ff38a357c449fc286">
compiler/GHC/CmmToAsm/Reg/Graph/Spill.hs
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<a href="#3aba9ceb20d68f25343fe3a27b2b7a4f8fea68da">
compiler/GHC/CmmToAsm/Reg/Graph/SpillClean.hs
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The diff was not included because it is too large.
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